| With on-board processing and on-board switching as the core of the new satellite communication system is the mainstream in today’s research and development. Researching on how to efficiently implement the demodulation based on onboard broadband variable rate has great practical significance to the research of satellite communication system This article is based on civil horizontal topic "demodulation technology of spaceborne broadband variable rate " To design and implementation variable bit rate in broadband signal demodulation for multi-user demodulation of the carrier synchronization and equalization module hardware, the main task is not only developing solutions can be realized according to the project requirements base on study of the carrier synchronization and equalization algorithm,but also the simulation and hardware. implementation of carrier synchronization and equalization algorithm.Firstly, this paper introduces the basic principle of carrier synchronization and several classic open loop and closed loop algorithm which describes emphatically the scheme used in the FFT algorithm and a second order phase-locked loop method.Secondly introduces the equalization technology in the basic principles of several common equalization algorithm are simulated and compared. Besides after considering the influence under the the satellite group delay channel condition of the broadband signal,we study correction ability of different modulation mode adaptive equalization under group delay channel to provide reference for the design in reference; Next, this paper introduces the background of project and provided hardware resources. According to the project requirements, it is pointed out that all the resources needed to implement the parallel structure is too big to this project requirements.Single high-speed processing is proposed using multiple low-speed data carrier synchronization and equalization module overall design,And also the simulation verification;Finally, based on the above theories, the FPGA implementation details are given to verify the feasibility of solution through hardware debugging. |