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Prototype System Design Of Power Line Communication

Posted on:2015-07-15Degree:MasterType:Thesis
Country:ChinaCandidate:Y DongFull Text:PDF
GTID:2308330479476217Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
Power Line Communication uses the existing distribution electrified wire netting to transmit signals,which has the advantages of low cost and short construction period. In recent years, Orthogonal Frequency Division Multiplexing technology in PLC application has become a research hotspot, and adopted by many international standard PLC organization. G3-PLC is an open protocol for intelligent PLC, which contains Forward Error Correction, OFDM, Analog Front End technology. Based on the study of G3-PLC protocol, OFDM algorithm, FEC code and AFE realization, the paper designed a PLC prototype system.The main works as shown as follows:1. Studying OFDM algorithm. OFDM as the core technology of G3-PLC protocol, can solve channel multipath time delay and frequency selective fading problem in power line. According to the analytic expression of the OFDM and cyclic prefix, describes the function and characteristics. Summarizing the advantages and disadvantages of OFDM in PLC application.2. Completed FPGA code design of PLC prototype system physical layer, gave the code realization project of FEC and OFDM modulation. Simulated correspond module of coding/decoding, modulation/demodulation between transmitter and receiver, and recorded data. The comparison between the recorded data, verifies FPGA code can complete coding and modulation of data correctly.3. Completed AFE of PLC prototype system. Using DAC121S101 to complete DA conversion, OPA564 to enhance emission signal drive capability, PGA112 to program-controlled amplify weak signal download from power line. Completed the design of schematic diagram and PCB of sumodule, welded and debugged the hardware circuit.4. Completed PLC prototype system test. The comparied result of fixed-point simulation of OFDM emission module by MATLAB and waveform logic analysis by ChipScope, verified the correctness of FPGA code. FPGA receiver using two correlation peak to detect synchronization module. Simulated AFE each unit and recored the changes of input/output value of each unit, these verified AFE design meet the functional verification of the design requirements. Implementation scheme of UART and SPI interface are given, realize the normal communication of PLC prototype system and peripheral equipment.This paper completed the design and debugging of PLC prototype system based on G3-PLC protocol, and laid a good foundation for the design of integrated circuit.
Keywords/Search Tags:PLC, FEC, OFDM, AFE, FPGA
PDF Full Text Request
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