The Implementation Of The Photoelectric Theodolite Image Compression Based On Multi-core DSP

As the requirements of Photoelectric Theodolite system for the quality of video has become higher and higher, High frame frequency、high resolution Image Acquisition System is used more and more extensive. It is nessasary that images with a good deal of data flow must be conveyed within the limited bandwidth, then the remote image can be received in real-time. So we focus on the high frame frequency, high resolution、data flow real-time compression and image conveying. To solve the two problems, we lanched on the research of parallel realization of H.264 algorithm encoding algorithm on the Multi-core DSP surrounded with H.264 algorithm grammatical hierarchy and technical features of C6678.Fisrtly, this paper illustrates the new research status of data flow compression in china and foreign country, then selectes the H.264 compression algorithm and DSP platform to complete real-time image compression from serveral compression algorithm and hardware implementation; Secondly, this paper elaborates the main technical points of TMS320C6678, including the kernel features and storage performance, explains the capacity of realization of Multi-core parallel, introduces the communication models between multi-core DSP, it is the theoretical basis for the last chapters; Thirdly, Based on the TI company H.264 mononuclear coding scheme, two Slice level parallel code division calculation algorithm are proposed. The first method is a static Slice level division method which is according to the image size to evenly assigned coding calculation; The second method is a dynamic Slice level division which is based on the computational complexity of the total macro blocks to evenly assigned coding calculation. Finally, Combines the parallel scheduling mechanism of Multi-core and data synchronization transmission mechanism, the workload of the H.264 compression algorithm is evenly allocated to the 8 kernels of TMS320C6678.This paper experiences on a image processing platform, the platform is to simulate photoelectric theodolite system, including image source which is generated by Optical transceiver and Emulation board, and the FPGA+DSP platform belongs to the system either. This paper devises the data transmission mode of the sysytem. Images between the source and image compression platform is transferred via optical fiber transmission, then FPGA which is in the image processing platform does the preprocessing work on the image source. The data flow between DSP and FPGA adopts the SRIO protocol, and we use the EDMA transmission mode to transmit data flow within the DSP. The result of the experient said that the three above transmission mode can meet 1k×1k, 100 frames per second image transmission bandwidth we need.The paper have completed the the software design on the image processing platform and designed a high effective way of data transmission. It effectively solves the problem of 1k×1k、100 frames per second of rapid image compression in real-time and synchronous transfer. Keyword: H.264, Multi-core DSP, SRIO, Real-time compression, Slice-level parallel,...