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Design And Implementation Of Image Analysis Module In Real-time FRC System

Posted on:2016-12-16Degree:MasterType:Thesis
Country:ChinaCandidate:R X LiFull Text:PDF
GTID:2308330476453413Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of semiconductor technology and consumers’ demand for higher quality of visual effects in the past few years, the ultra high-definition television industry has made enormous progress. In the meantime, the display frame rate of large-screen devices has been raised sharply. Nevertheless, due to the limited bandwidth of the current digital signal transmission system, the video frame rate in transmission is lower than the screen display frame rate. Such mismatch leads to fuzziness, pause, smear etc. In video play, which seriously impairs the audiences’ visual effects. For one thing, video frame rate conversion technology, as a vital means for video post-processing, it can match the display device of the broadcast frame rate in video play by increasing the display video frame rate, so as to solve the display problem caused by frame mismatch. For another, in the case of ultra high definition special sequences, such as the film mode sequence, the fade-in and fade-out mode sequence, the animated mode sequence and so on, the traditional FRC algorithm based on motion vector field which can not receive true trajectory to obtain precise interpolation motion vector field, will be severely weakened in its effects. To resolve the problems mentioned above, in this thesis the image analysis module-core sub-module is designed for the purpose of enhancing the performance in ultra high-definition FRC system. Moreover, the core sub-module can monitor the FRC modes upon the real-time detection of the features of input video scene, thus improving the performance of FRC algorithm in a manner of high detection rate, low resource and power consumption.The two main functions of this image analysis module include the film mode real-time detection and the fade-in and fade-out mode real-time detection. On the one hand, the film mode detection algorithm mainly refers to that the video sequences are divided into several blocks and then sampled irregularly for statistical pixels histogram. By comparing the statistical result with the threshold as well as analyzing, the film mode can be evaluated and determined. On the other hand, the fade-in and fade-out detection algorithm is performed in line with the fade-in and fade-out sequence model and its linearity, and the fade-in and fade-out mode can be detected via the luminance histogram calculating and accumulating the data.To further the algorithm performance, this thesis also optimizes the hardware resources by dramatically reducing it through reusing circuit. Last but not the least, this thesis discusses the synthesization and verification of the design by delivering detailed detection and verification plans, which verify the functions of the image analysis module in regard of both module level and system level. The results show that, the 300 MHz frequency in the design of the thesis meets the requirement of real-time processing at 50/60 Hz Ultra High-Definition TV. And the hardware resources cover about 0.59mm2 under 65 nm CMOS(Complementary Metal Oxide Semiconductor)technology.
Keywords/Search Tags:UHD, FRC, Film mode detection, Fade mode detection, hardware resources, real-time
PDF Full Text Request
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