Passive millimeter wave(PMMW) imaging system for near field achieves images based on the difference energy of millimeter wave radiation which is got by high sensitivity receiver between the target scene and object. As to the advantage of this system which is non-radiative, can penetrate clothing, is easy to detect metal, and has no privacy infringement; the PMMW system has been widely used in the field of security inspection, military reconnaissance etc. Because of its high imaging real-time requirement, multi-channel acquisition of the imaging system must be designed and developed. Because of noises of the PMMW image, original image of the system must be preprocessed. In order to the real-time requirement of the system, preprocessing algorithm must be implemented on FPGA.This master thesis, a multi-channel data acquisition unit of the PMMW imaging system has been designed and implemented, and the main preprocessing algorithm of PMMW image also has been implemented on FPGA. The main work includes:1. The basic theory and architecture of the system has been analysised,and the main technical index of the data acquisition unit also has been analysised. The basic theory of the preprocessing algorithm about PMMW image has been introduced.2.The structure and implementation scheme of the data acquisition unit has been design. The selection of main device,the design of hardware circuit,the interface of circuit,and the design and implementation of PCB have been completed based on the parameters and the index of the system.3.The logic sequential circuits have been designed and implemented by Verilog HDL based on Quartus software platform.The functions of data acquisition, data preprocessing,data storage,transmission and control of data have been completed which are simulated by software Modelsim.4.The test and experiment of the entire data acquisition unit have been completed,which are met the functions of the PMMW imaging system.5. The impulse noise and the stripe noise in the image have been removed by the fast median filtering and neural network algorithm on the FPGA,and it obtained a good denoising effect. |