| In architecture research, the simulator is very popular in both industry and academia. Because it just needs little time to develop and the implement of the simulator is very simple. Besides, the simulator can act exactly the same as the true hardware. Among different kinds of simulators, processor simulator is one of the most widely used one, and memory system is the key module of processor simulator. In real applications, memory access operations occur very frequently because a large percentage of instructions are memory access instructions. As a result, the acceleration of memory system simulation is very critical to the performance of simulator.Based on the AT697 processor simulator, this thesis gives a systematic research on the acceleration of memory system simulation, focusing on the space overhead and performance acceleration. The main contributions of this thesis are as follows:1. A paging simulation mechanism is introduced to save the space overhead of simulating large target memory space. It is very difficult to simulate the whole target memory space directly because the memory space of AT197 is very large. In this thesis, we creatively use the virtual-real address translation mechanism of operating systems in memory simulation filed. We present a paging simulation mechanism to only simulate the used space. This method saves most of the space overhead in simulation.2. A multi-level paging simulation mechanism is proposed to further improve the simulation performance. One-level paging mechanism usually induces lots of link-table lookup operations, making the address translation very slow. Multi-level paging mechanism can reduce or remove these link-table lookup operations. The results show that two-level paging mechanism achieves 12.8% higher performance than one-level paging mechanism.3. To further improve the simulation speed of most frequently access memory space, this thesis introduces a hybrid method which combines static mapping method and dynamic paging mechanism. For the frequently access space, we use static method, meaning that we directly map the target address into simulated address. For other infrequently access space, we still use the dynamic paging mechanism to save the space overhead. The results show that our hybrid method achieves 14.8% higher performance than dynamic paging mechanism. |
