Research And Implementation Of Digital Self-interference Cancellation Method In The Full-duplex Microwave Communication System

Full-duplex communication means that the same two radio communication devices simultaneous transmit and receive radio signals at the same time and the same frequency. Compared with the traditional half-duplex communication, full-duplex technology makes wireless communication link spectrum efficiency doubled, and then makes the channel capacity of communication system doubled.In full-duplex communication system, how to achieve self-interference cancellation is the core problem and technical difficulties. The existing self-interference cancellation technology can be divided into three kinds, namely, antenna interference cancellation, RF interference cancellation and digital interference cancellation. In this thesis, the core is self-interference cancellation method of digital domain in the full-duplex microwave communication system, also the system simulation and FPGA implementation of the method are completed.Firstly, the requirement analysis of the full-duplex microwave communication system is proposed, including function requirements and performance indicators. Combined with the principles of digital communication systems, the system frame structure is designed, and the design ideas are analyzed. Then the signal processing in transmitter and receiver are explained, including the CRC, LDPC encoding and decoding, 256 QAM modulation and demodulation, channel estimation and equalization, time and frequency synchronization and so on.Secondly, the algorithm derivation, link building and performance simulation about the digital self-interference cancellation method are proposed, the simulation including digital interference cancellation performance simulation and performance simulation of the full link, then the floating-point link is convert to fixed-point link. Simulation results show that the larger of frequency domain window and forgetting factor, the better offset performance in digital interference cancellation. And the ability of digital interference cancellation can achieve 52 d B or more. With the corresponding multipath simulation environment in full-duplex microwave communication system, when SNR equals 31 d B, the ISR changes form-18 d B to 18 d B, the corresponding BER reaches 10-6. That is to say, the digital interference cancellation module designed in this thesis reached the project requirements.Finally, a top-level logic design about the transmitter and receiver in the full-duplex microwave communication system is implemented, particularly illustrated the FPGA implementation process of digital interference cancellation module, including the top-level design, sub-module internal structure, work process, timing analysis and so on. And based on the hardware platform, a function test about the transmitter and receiver, a performance test about the digital interference cancellation module are conducted. The test results show that, the FPGA implementation of the system can offset the self-interference signal of 47.7d B or more.In the final chapter, this thesis summarized the contents of the above, analyzed the system where can be improved, summed up the experience and lessons gained during the project development, and proposed the next approximate future research directions.