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Design Of A 600V VDMOS With VLD Terminal Struction

Posted on:2016-10-15Degree:MasterType:Thesis
Country:ChinaCandidate:G C XuFull Text:PDF
GTID:2308330473452183Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
VDMOS is a new generation of power semiconductor devices, which has been not only widely used in civilian areas, but also in the military field. It has excellent electrical characteristics, such as high input impedance, low drive power, wide safe operating area, etc. The structure of VDMOS can be divided into cellular area and terminal area, and the field plate / field limiting ring structure has been commonly used for terminal structure design. However, this terminal structure will increase the chip area and the cost of production, lower the character/price ratio. Compared to the field plate/field limiting ring structure, the VLD(Variable Lateral Doping) terminal structure has greatly reduced the length of terminal, lowered the cost of production, and upgraded the character/price ratio. However, due to the facts that the domestic research of VDMOS starts too late, and the manufacturing processes and technology are relatively backward, there is little VLD related product. Thus the research of VLD terminal structure is essential to the development of excellent VDMOS related products.Based on a related project, this paper has analyzed the working principle of VLD related terminal structure, and has finished a design of VLD product. The main parameters indicators are: the breakdown voltage is more than 606 V, the threshold voltage range from 2V to 4V, the on-state voltage drop is less than 1 V, and the on-resistance is less than 1.25 Ω. The main purpose of this paper is to provide a design of VLD related product, which can be used for a reference for the subsequent development of VDMOS. The main contents of this paper are as follows:1. Briefly introduce the terminal theory, based on a technology platform to design the process. With the help of Tsuprem4/Medici, simulate and optimize the process steps and x device parameters of cellular part to meet the requirements of the project partners.2. Simulate and optimize the terminal structure of VDMOS. Firstly, the field plate/field limiting ring structures have been adopted and optimized to get the result that the peak electric field is less than52′10 V cm. Based on this result, the VLD terminal structure has been considered in design, and the more ideal results have been gotten.The distribution of electric field has become more uniform, and the size of terminal part has also been greatly reduced.3. Layout Design and Tape-out. The current partial static parameters of tape-outresults are as follows: the field plate/ field limiting ring structures basically meet the requirements, and the breakdown voltage of VLD terminal structure range from 100 V to400V. There still are some parameters need to be improved and optimized.
Keywords/Search Tags:Cellular, VLD, Breakdown Voltage, Field Limiting Ring
PDF Full Text Request
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