Implementation Of Physical Layer For GSM Femtocell

As a comp lement of mobile communication networks, home base station(Femtocell) can sup p ly the subscribers with better exp eriences of voice and data business. In recent y ears, the mobile network op erators and equip ment manufacturers p ay more and more attentions to the dep loy ment of Femtocells. Home b ase station usually consists of micro base stations and fixed network access comp onents. Femtocells use fully standard wireless p rotocols over the air to communicate with standard mobile devices, in cludin g mob ile p hones and a wid e ran ge of other mobile- enabled dev ices. The aim of this p ap er is to describe the hardware imp lementation of the p hysical lay er in GSM macro base station, which is the main p art of Femtocell.The develop ment hardware p latform is Xilin x FPGA(Sp artant6 series) and TI DSP(C6000 series). The FPGA is resp onsible for GSM p hy sical lay er, includin g modulation/demodulation p rocess of baseband signal, while DSP is resp onsible data-link lay er and net lay er. This p ap er focuses on the hardware architecture design of p hy sical lay er in FPGA. The whole design is div ided into three p arts ——interface design, downlink transmitter module and up link receiver module. The DSP writes the data to be sent to the p hy sical lay er and also reads the received air data from it through the interface. In addition, this interface is also used for other configuration for RF board. The main p art of the downlink transmitter is GM SK modulation. Its Gaussian filter is imp lemented by IP core and the orthotrop ic I/Q signal is generated by look-up table. The mainly work of this p art is to make sure that all the d ata is transmitted correctly accordin g to the frame format described in GSM standard p rotocol. In this design, a sp ecial FSM is designed to fulfill this function. The up link receiver module consists of the hardware arch itecture design of sy nchronization, channel estimation, M LSE equalizer and so on. Among these p arts, the M LSE equalizer is the mainly sub-module of up link receiv er. In order to save the hardware ar ea, the Viterbi algorithm is introduced.In the last, tests on transmitter p art and receiver p art are conducted. The sp ectrum of the transceiver fulfils the demand of G SM standard p rotocol. All the modules of up link receiver function well while r eceivin g AB data and NB data from M S to BTS. During the functional testing p hase, we can see that the M S can r eceive the BSIC information and BCCH infor mation transformed by the macro base station correctly and send AB data and NB data to access the macro base station.