The Design And Implement Of Digital Baseband Based On 2.4GHz

With the rapid development of urban transportation, the number and coverage area of new expressway are increasing. Nowadays, the construction of intelligent charging system has been put on the agenda in several major cities in china. In this paper the digital baseband system of intelligent charging system was studied. One design scheme which Zigbee is compatible with Bluetooth protocol was implemented.Firstly, the digital baseband system architecture based on 2.4GHz was designed. This architecture consisted of analog front end, digital baseband, register, protocol processing and I/O modules, and among them the digital baseband module was made up of transmission subsystem and reception subsystem. Based on this architecture, the digital baseband transmission subsystem by using Verilog HDL(hardware description language) was designed. The transmission subsystem included PPDU, symbol-to-chip, chip-to-precode, CRC and whiting. This system could modulate frequency by using the symbol-to-chip and chip-to-precode and achieved the compatibility between Bluetooth protocol and Zigbee protocol. The simulation results show that the system can send 2M bits of data per second, when using 16 MHz clock frequency. The reception subsystem included down-conversion, low-pass filtering, differential demodulation, packet detection, frame synchronization and frame analysis. The demodulation process consisted of down-conversion, low-pass filtering and differential demodulation, and could switch clock frequencies from 32 MHz to 16 MHz. The decode process was made up of packet inspection, frame synchronization and frame analysis, and could store the data. The simulation results show that the system can receive 2M bits of data per second, when using 16 MHz clock frequency after down conversion. Finally the digital baseband system was simulated with Synopsy’s VCS tools. The simulation results show that the compatibility between Bluetooth protocol and Zigbee protocol can be achieved. When using 16 MHz clock frequency, the system can dispose 2M bits of data stream per second and meet the design requirements. Besides, the system in this paper had certain reference value which laid the foundation for the study of short-range wireless communication system.