Analysis And FPGA Hardware Implementation Of Power Line Channel

With the rapid development of communication technology, the power line as the most widely coverage network, can be an effective solution of "the last kilometer" communication, that high data rate transmission such as Internet access, video and voice flow applications, can be realized by low voltage power line with frequency ranging up to 30 MHZ, and the reaserch of the characteristics of power line channel has been a hot topic. Channel simulator can simulate channel fading and noise in the actual line, in particular, the signal passed through the channel simulator, can determine whether the signal suitable for transmission in the channel environment, by monitoring signal features in both time domain and frequency domain at the receiving end. and we can achieve channel features in various scenarios through the channel emulator with different parameter configurations, which play an important role in the actual research for the selection of equipments and channels. In recent years, less reaserch for the simulation and test of power line channel simulation system has did in a lab environment, although the low-voltage power line communication system research have made great progress. This article will discuss the characteristics of power line channel and its’ implementation by channel simulator. In this paper, characteristics of the channel and noise of Power Line Communication system was studied. We compare the methods to realize Power Line channel in the domestic and foreign field. The Power Line channel and noise are realized by using FPGA, and are tested in a laboratory environment. The transmission of data on PLC(Power Line Communication) equipment is also realized, which verify the feasibility of the system.This article is focused on the characteristics of power line communication channel and noises in the system and proposed a novel scheme of the host hardware implementation for the power line communication test system based on FPGA emulation combined with the characteristics of FPGA, we also optimized the channel noise model and realized the scheme by different function modules. The function simulation is realized using Verilog hardware description language in the Modelsim software environment, and integrated in the ISE.The conversion between analog and digital is realized by Through A/D and D/A modules. Finally, we obersved the waveform of channel and noise in the time domain through the oscilloscope and realized the two-way communication on PLC equipments in the lab environment.