Impulsive Noise Cancellation Algorithm And VLSI Implementation In Broadband Power Line Communication

PLC (Power Line Communication) is being used to communicate by power lines which transport the electric energy. It is limited to single-carrier modulation technology with low data rate in the early days. Recently, it is developing to multi-carrier modulation technology with high data rate and broadband communication. The focus of this paper is impulsive noise cancellation over power line channels. The issues researched include how to reduce complexity of algorithm and hardware area and how to improve the algorithm performance.BPLC (Broadband Power Line Communication) is a special communication channel. It is known for with its cost-efficient installation and convenience to deploy for consumer applications. But, the noise is one of the major impairments for data transmission over power lines, especially impulsive noise. There are many kinds of noises based on different sources and their own characteristics. We can divide these noises into two categories according to their different effect on data signal. One is background noise, and the other one is impulsive noise. Based on the international standard of PLC---IEEE1901, in which the OFDM modulation is used, we investigated the impulsive noise cancellation over power line channels in this paper.In this paper, we proposed background noise and impulsive noise model in PLC. Because of complexity of impulsive noise, we used two kinds of methods to model the impulsive noise of power line, one is impulsive noise with sine wave, the other is impulse. After that, we addressed different algorithms to mitigate the effect of impulsiveness. Then, we simulated these algorithms in PLC by MATLAB. From the simulation results, there are good performances while we use interpolation to eliminate the impulsive noise with rising and failing edge that their duration is from lOus to50us. At the same time, we used the compress sensing algorithm to mitigate the impulsive noise with bursts that their generation rate is from1%to10%. The proposed technique is robust. At last, hardware architecture is also presented together with its achievable performance according to different impulsive noise cancellation methods. To analyze its cost, we used design compiler of Synopsys to compile the VLSI design with SMIC0.13standard CMOS cell library. The compiling results show that it can meet the requirement of clock frequency.