Research And Design On The Model Of NoC Interconnect

With the rapid development of semiconductor technique, the integrated circuit process has entered into deep sub-micrometer and nanometer design stage. Therefore, to deal with the communication bottleneck caused by So C’s single bus and single clock, the appearance of Network-on-chip(No C) is inevitable. However, the interconnect structure of No C is becoming extremely complex. At high communicated speed, interconnects induce signal integrity problems such as attenuation, reflection and crosstalk. This thesis gives a deep research on the non-ideal effects of interconnects in consideration of features of No C.The main research work of this paper is as follows:First, the research background and significance, as well as the topological structure and design difficulty of on-chip interconnects are discussed. Then the transient models of transmission lines, including distributed RC model and RLC model, are analyzed. Based on the transient model, the signal integrity problems of high speed on-chip transmission lines are evaluated. Afterwards, simulator Hspice is used to evaluate impedance mismatch and Cadence spectre to crosstalk.Then, the transmission line effects in deep sub-micron and high frequencies are discussed. The mixed-mode S-parameter theory of differential transmission lines is introduced. In addition, the model of differential transmission lines is built in HFSS simulator to acquire its S-parameters. Due to feature size shrinking and frequency increasing, the loss of long transmission lines becomes more and more significant. So it is crucial to establish a simple and efficient method for evaluating the loss of interconnects accurately. Through establishing the decoupling partial differential equations of transmission lines, a loss evaluating model is proposed, with which the estimated loss is within 5.20% average error in comparation with HFSS simulation. Besides the loss, another significant signal integrity problem caused by the conversion from differential to common mode due to the mismatch of differential impedance and common impedance is the common mode noise, which is studied as well. For variousdifferential transmission line structures, the effects on scattering coefficient and common mode noise are evaluated through simulation by Ansoft HFSS and ADS.Finally, in order to compensate the ISI(Inter Symbol Interface) and loss in long transmission lines, a high-speed transceiver based on current mode logic is presented. Through the addition of pre-emphasis circuit in transmitter and equalizer circuit in receiver, this transceiver can realize 5Gbps signal transmission with 3mm interconnect.