| The edge of image refers to the area where the grayscale changes drastically. It contains rich information. In the field of image processing technology, image edge detection technology occupies important position and it has been widely used in aviation, transportation, artificial intelligence, medicine and so on. Due to the enormous stockpile of information, it’s difficult to complete the image processing simply by general serial software processing system in real-time system.However, hardware speeds up the processing and become a completely new tool according to its parallel processing mode. There exists a defect that the traditional hardware processing systems are expensive and difficult to reuse.In the 1980’s, XLINX Company invented the field-programmable gate array (FPGA). It turned to be popular for its high-speed processing speed, rich resources of logic, and flexibility of reuse.This article designed edge detection system based on Sobel operator with the Cyclone IV FPGA chip. System is divided into six modules:clock control module, image acquisition module, image processing module, data caching module, display module and the outer button control module. When system works, the clock control module provides accurate synchronous clock and global reset signal. Driven by the clock, image acquisition module starts to configure the camera registers and splicing data which were collected by camera, then send the data to the image processing module. Caching module complete the different clock domain transfer between the image processing module, display module and send signals to the Video Graphics Array (VGA) interface. Finally the edge detection results could be showed on the screen. Button control module is used to control the size of edge detection threshold and complete variable threshold edge detection.The difficulty of this design is the configuration of camera registers, the implementation of Sobel algorithm and the control design of SDRAM. Shift register was used in design to simplify the generation of pixel neighborhood. Meanwhile, a fast median filtering algorithm was also used to speed up the processing speed. During the edge detection, outer button achieved the dynamic threshold edge detection. After that, corrosion expansion algorithm strengthened the results of edge detection. In SDRAM controller, Ping-Pang Bank cache way increase the fluency of image output and SDRAM memory resource utilization.Each module has gone through by the Modelsim simulation and uses the SignalTap Ⅱ to grab real-time signal of chips.After verification, this design can use FPGA implement the functionality of image edge real-time detection on 480 *640@ 60HZ。... |
