Research And Design Of High-Density LED Controller

LED driving controller is the core of LED display, which decides the pixel density and display quality. With the development of information and HEVC technology, especially after 1080p and 4K video appears, the data of video increases dramatically, and the color of the video is more and more abundant, which demands higher performance of the LED display. But the communication of main LED driving controller at present is based on serial shifting technology, which is difficult to achieve a higher communication speed and refreshing rate. In addition, white-balance correction is hard to realize. The communication speed, refreshing rate, gray level, driving number and white-balance correction of LED driving controller are key issues in the development of LED chip.The paper aims at the problems above and the practical requirements, proposes a creative architecture, and carries out front-end design and back-end design. The following content will be discussed in the paper:1) The paper analyzes the status and insufficient of LED chip overseas and domestic. Aimed at the insufficient of LED chip, we discuss the feasibility plan.2) Introduce the related technologies, analyze the insufficient of LED chip and raise a new architecture.3) Introduce the architecture and implement each module.4) Create the test platform, and verify the function, robustness and FPGA of the project.5) Carry out back-end design according to the Synopsys design flow.The innovation points are as following:1) Design double bus and realize address configuration and data distribution;2) Realize gamma correction and white-balance correction through SRAM on chip;3) Use distributed PWM technology to raise refresh rate;4) Design initial module and realize auto initialization.The paper can improve communication speed, white-balance configuration, refreshing rate and gray level, and have significance in both research and application.