Research And Implementation Of The Binocular Vision Stereo Matching Algorithm Based On FPGA

Binocular stereo vision has always been an important research object, which is a wideapplication prospect in the field of robot navigation, aerospace monitoring and visualreality. Stereo matching is an important research direction of binocular stereo vision. Thebinocular vision stereo matching algorithms with computational complexity and largeamount of data are unable to meet the real-time requirement, so they are restricted in thepractical applications. This subject chooses Field Programmable Gate Array (FPGA) asthe acceleration platform of hardware and the VHDL (Very-High-Speed Integrated CircuitHardware Description Language) is used to implement the binocular vision stereomatching algorithm. The problem of processing speed is solved through parallel andpipelined functional modules.By comparing the advantages and disadvantages of various algorithms, this subjectchooses the algorithm based on Census Transform to research. The algorithm is dividedinto image acquisition module, census transform module and post-processing module, andthe implementation diagram and state machine of each module are described in detail. Inthe part of the hardware design, corresponding parallel schemes are used to accelerateeach module.This subject chooses Xilinx XC6SLX150as the processing core, ISE14.4as thedevelopment tool and Chipscope as the debugging tool. Finally, the stereo images from theMiddlebury datasets are chosen as the experimental subjects and the experimental resultsare analyzed in the matching accuracy and the processing speed to verify the feasibilityand effectiveness of this subject.