Design Of Public-key Cryptograghy Althorithm Computation Unit For Mobile Payment

Nowadays,with the popularity of mobile devices, the amount of mobile payment arebooming. In the current mobile payment services, the security of the transaction hasbecome the most critical issues. In e-commerce, WPKI agreement is the commonagreement, it is based on the security of WAP. WPKI facilities using public keycryptography, certificate management strategies, software and hardware technologies towork together effectively to establish a secure and trusted environment for wirelessnetwork communications. In this paper, public key encryption algorithm,such asECC\SM2\RSA are analysised.the results show that although their overall operationalprocesses are different, but they all involve some basic arithmetic unit. Both the RSA,ECC, SM2are related to modular multiplication, modular exponentiation, large numbersmultiplication, large numbers additon and modular inversion operation.so we can design apublic-key cryptographic operations acceleration unit, the circuit for these arithmetic unitthe design and implementation, and by scheduling software to run these basic arithmeticunit, we manage the process of different algorithms.In this paper, we design a public key cryptographic operations unit, includingcomputing unit, and also theAHB interface module and the memory interface unit.In the modular multiplication unit, we design and implement by two differentways:directly with the1024addition of the module and also the addition of256completedmodule reuse modular multiplication circuit structure, through simulation and synthesisreport gives two ways to achieve a circuit difference in operation time and footprint. Depthanalysis simultaneously multiplexing circuit works the way, given the low number ofgeneral addition module reuse to achieve high number of modular multiplication operationtime of the general law. In32MHZ clock frequency, in order to achieve1024modularmultiplication algorithm, the1024-addition module needs only0.000032s,256-addition module needs0.00026s, while32-addition module needs0.002s.In the modular exponentiation unit, we use an R-L binary scan method,in this waymodular exponentiation will be simplified as a series of modular multiplication. Similarly,in order to achieve1024bit modular exponentiation, the1024-addition module needs0.05s, while the circuit area will be about53,000gates, using a256-bit additionmodule requires0.42s, while the circuit area will be about15,700gates, using32-additionmodule needs3.15s,that seems to be too low. considering the computing time and thearea, eventually we use256-additon module in our design. In this multiplexing method,wecan achieve any256n-bit modular multiplication, modular exponentiation.In modular inversion unit, according to Euler’s theorem to modular exponentiationtransformed into modular exponentiation, through a simple subtraction circuit will enterinto a modular inversion modular exponentiation appropriate input by calling modularexponentiation unit to achieve modular inversion.In large numbers multiplication unit, designed and implemented arbitrary units digitmultiplication of large numbers, the multiplicand and the multiplier from low to high inturn, and then the results of each round will be a shift operation.for256bitmultiplication,the circuit area of about5950gates.In large numbers subtraction unit, the structure of the CSA and CRA are given,through CSA,3-input module can be converted to2-input module, and can be a good CRAcompleted two input adder. Subtraction means for, by the subtraction is converted to the3-input adder complete simplified.For each operation unit, the paper gives the simulation results are for modularexponentiation, modular multiplication, modular inversion, multiplication of largenumbers, this paper gives the results of its consolidated under the DC and the finallayout.the evaluation show that comparing with traditional modular multipul unit,the areais reduced by1/4.