The Implementation And Optimization On TD-SCDMA Downlink Receiver Based On Multi-Core Processor

Channel estimation and Joint-Detection are the key technology in TD-SCDMA system receiver. Joint-Detection can eliminate multiple access interference and multi-path interference, and can improve system performance and increase the cell coverage. Channel estimation provides necessary parameters to Joint-Detection. Accurate parameters can improve Joint-Detection performance. TD-SCDMA is a real-time communication system that has strict rules in signal processing. So using high-performance multi-core processors to complete the downlink receiver is necessary. Therefore, design and implementation TD-SCDMA downlink receiver based on multi-core is important. It has important significance both from theoretical research and engineering practice.The thesis research Channel estimation algorithm and Joint-Detection algorithm. At the same time, design, implementation and optimization of a TD-SCDMA downlink receiver based on multi-core processor is presented. Firstly, clarify Channel estimation and Joint-Detection algorithm based on TD-SCDMA system downlink receiver modular decomposition. Because Joint-Detection has high-dimensional complex matrix inversion problem, approximate Cholesky decomposition algorithm is introduced, which can effectively reduce complexity of the approximate decomposition algorithm. Secondly, module design, coding and optimization using approximate Cholesky-decomposition algorithm on multi-core processors is implemented. At the same time, data structure optimization, program structure optimization and SIMD instruction optimization to solve modules operating efficiency and running time problem are presented. Finally, optimization is effecticy and correctness are proved.