The Design Of Virtual Bus Analyzer Through USB Interface

The bus is a common set of signal lines; it is an important data exchange channel of integrated circuit.The trend of the bus is less wiring and higher speed, I2C, SPI,1-Wire are the most widely used serial bus. However, since the mount devices on the bus may be very large, various control signals, address signals, data signals intertwined.Currently, When analysising and debugging the IC bus communication, people still rely on logic analyzers, oscillocopes and other instruments, through artificial comparation and empirical analysis not only time-consuming, but also prone to error. It makes the design, fault detection and diagnosis of the digital system more and more complex. And both of the method can not judged the direction of the bus signal transmission, and neither able to crawl data domain information from a particular device or locate the specific source of the fault. It can’t meet the analysis requirements of bus detecting.Therefore, the design a kind of bus analyzer which can detach the sinal transmition derection and decode the data of bus is of great significance.This paper completes the following tasks:Hardware cuicit design and Hardware diven promgraming of the lower machine. The main work includes:(1) Studied the principles and the basic structure of bus analyzer, the mainstream instrumention design scheme of current, and conducted a more detailed analysis and comparison.(2) This paper designed a signal acqusition circuit which can distinguish the data source and timing without interferences the original data transmition process.(3) The system is completed the design of4-layer high-speed PCB board which contains the FPGA, USB, SDRAM, watchdog, and power supply module.(4) Studied the embedded system development based on Nios II, and completed the USB FIFO controller, trigger control, data trasmition and other driver promgramming.(5) This paper designed a watchdog guarding system it provides some features such as:hot and cold restart witch is based on a triple error handing and recovery mechanisms which is helpful to improve system reliability.(6) Studied the working principles and structures of virtual instruments based on usb, and complete the framework design of CY7C68013A. (7) Studied the working principle of the upper machine, and proposed a design flow of the upper machine.