The Analysis And Design Of IR-UWB Receiver In CMOS Process

The communication distance of Ultra-wide band system is short. It is thought to be used in the wireless personal area network. The applications of this technology include radio frequency identification (RFID) system, vehicular radar system and range measurement system. In2002, FCC unlicensed3.1GHz-10.6GHz as UWB band. So the UWB technology is becoming key technology of the next generation of wireless communications. Miniaturization and integration is important and difficult in today’s UWB technology research. Since CMOS technology has grown fast, it provides possibility to fulfill UWB communication system on chip which has significant prospects. This paper is to explore the design and implementation of IR-UWB receiver RF front-end circuits under CMOS process. The detailed contents and innovational work are summarized as followings:Firstly, this paper is focused on the research of energy detection receiver circuit design. Using current reuse configuration of two-stage low noise amplifier, the peak voltage gain of amplifier is up to22dB and the voltage gain is tunable and can be switched into two levels. Cascode-cascade balun circuit can transfer single-end signal into differential-end signals which have same amplitude and inverse phase. The pair of NMOS and PMOS FET consists of one type of multiplier which consumes only3.52mW DC. The other type of multiplier is based on Gillbert cell which can amplify the signal150times. The envelope of the signal can be extracted by the Gm-C integrator circuit.Secondly, this paper presents two solutions of the energy-detective receiver RF front-end circuits covering3GHz-5GHz.The receiver diagram shows every block of the system. We also analyzed the circuit structure and theory in detail and carried out simulation results. Both of the size of two type receivers are1.7mm*1mm.The received power range of two receivers are-62dBm--35dBm and-52dBm--20dBm respectively.Lastly, all circuits are designed and simulated under0.13um CMOS technology Cadence environment. Co-simulation of the layout and schematic has been done. The time-domain results shows the receiver performs well and has good range to receive signals. The implementation has been completed successfully.