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Study Of Chip Layout Design Technology And It’s Optimization

Posted on:2015-11-24Degree:MasterType:Thesis
Country:ChinaCandidate:Y Z ZhuFull Text:PDF
GTID:2298330467469449Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
The integrated circuit (IC) is a special circuit to achieve specific function withthousands of semiconductor devices on a semiconductor substrate. The IC layout design isa special way which transfers abstract circuit design idea into design drawings of specialIC process. With the appearence of the IC, it makes people’s life completely changed andpromotes the progress of the society. It relys on the layout design of IC to achieve thisgoal.In this dissertation, all the discussed issuses come from the actual experiences in IClayout design. First, the tools of layout design are introduced, and then some topics arementioned including layouts of basic CMOS components, electrostatic effect(Electronic-static Discharge, ESD), Latch Up failure layout improving strategy, and themethods/skills of layout design, etc. Calibre verification tools are also introduced aboutsettings and verifying techniques.With the upgrade of semiconductor technology of new material and new fabricationprocess, the design concept updated simultaneously. The IC layout design has already beennot only an original simple graphic design, but also a complex design problem with variousaspects should be considered. So study of the IC layout design technology and it’soptimization is very important.
Keywords/Search Tags:CMOS integrated circuit layout design, chip failure, matching technology
PDF Full Text Request
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