Design And Implementation Of The EM Algorithm Based OFDM Iterative Receiver

OFDM is a kind of frequency division multiplexing technologies, which can provide high spectrum efficiency. With OFDM, the allocated frequency spectrum is divided into a series of subchannels. The channel frequency response is nearly flat for each subchannel. Furthermore, the OFDM system can eliminate interframe interference through the use of a cyclic prefix that is longer than the maximum delay spread of the channel. Because of these advantages, OFDM system has become an integral part of the4G wireless mobile communication system. Channel estimation technique is critical for the success of OFDM systems. It is impossible to achieve a reliable data communication process unless a suitable channel estimation algorithm is available.Channel estimation method can be divided into three types, namely, pilot channel estimation, blind channel estimation, semi-blind channel estimation. The EM-based iterative channel estimation method as a semi-blind channel estimation algorithm, can save system spectrum resources and improve the channel estimation performance.In this dissertation, an EM-based iterative receiver is designed for the OFDM systems. Through the iteration process between the EM-based channel estimation and the BCJR decoding algorithm, the precise channel estimates can be obtained. The basic principle of the EM-based channel estimation method and the BCJR decoding algorithm is introduced in detail, and the performance of the designed EM-based iterative OFDM receiver is simulated by using MATLAB. The simulation results show that the designed iterative receiver outperforms the traditional receiver which uses the pilot channel estimation method.Consequently, the main components of the EM-based iterative OFDM receiver are implemented in the3L diamond software radio develop system. In order to save the storage resources in FPGA processor, this dissertation converts32-bit floating-point number to16-bit floating-point number, and using VHDL language to write the floating-point arithmetic. The iterative receiver system on this hardware platform is decomposed into many independent module, such as the OFDM module, the BCJR algorithm and EM algorithm module. Then these independent modules are put on the appropriate processor, and are complied by the C compiler and the ISE compiler respectively. After the compilation, each module is tested. These modules are connected by suitable communication resources under the case of each of them is tested correct, and then the system is compiled and downloaded to the board.