Computer Architecture Experimental Platform Based On FPGA

This paper designed the "Principles of Computer Organization" courseexperimental platform to the model computer and achieve the upper computer systemplatform. Experimental platform is the ability to verify the composition of the variouscomponents of the computer experiments and model computer whole experiment.Experimental platform consists of upper and lower computer as: lower computer toexperiment Box, to FPGA chip as the core, supplemented by other chip and interfacecircuit; upper computer as a PC computer, experiment, experimental platform PCoperating system. Upper computer system can be independent of the experiment, alsoassist lower computer in the experiment. Upper and Lower communication usingRS-232C communication protocol.Upper computer system can both stand-alone mode and online experiments.Experiments in single mode, PC unit from the lower machine independentexperiment,in this time using the upper computer system, computer parts andmachine simulation model; experiment in online mode, PC and the experiment box tocommunicate using RS-232C, lower computer use the FPGA to the computercomponents and model computer simulation, the upper computer to write instructions,compiled into machine code after writing lower computer, and under the supervisionof the FPGA model in machine condition, display FPGA in the internal register data.Model computer design, including architecture design, model computer logicfunction of each part and pin design, model computer instruction system design,microcode design and instruction of the assembler and disassembler design. Designmodel computer to simulation of the FPGA in lower computer, and can in the PC,using software emulation.Upper computer system by the confirmatory experiment module, the wholeexperiment module, communication module. Confirmatory experiment module of thesoftware simulation of the computer components, including chip simulation usingobject-oriented chip-based simulation technology; components simulation usingsimulation technology based on chip components; using event-driven mechanism forsignal transmission between chips. Whole experiment module software simulation ofthe model machine model machine instruction and the instruction of the assembler,disassembler. The simulation model machine which uses object-oriented simulationtechnology; instruction set simulation using interpreted CPU simulation technology;assembler compiled using one-scan be achieved; disassembler mainly oncase-by-code machine code disassembly way achieved. Communication moduleprovides control and synchronization of data format of communication through theanalytic realization of the instructions on the lower computer to write and monitoring.