Research And Implementation Of Digitization For Wideband Phased Array Radar

Wideband phased array radar (PAR) is an important equipment for modernizationconstruction of national defense. In order to achieve long range detection, large antennaaperture is necessary for the phased array radar; the ability for wide angle scanning isessential for broad beam coverage; PAR must provide high range resolution for recognitionof the targets from airspace. However, with the increase of antenna aperture and thebandwidth of transmitting signal, the effect of PAR aperture full time will be more andmore serious. It will lead to the reduction of synthesized echo power and even the radardetection range.For the problem above, the classic solution is using True Delay line (TDD) atsub-array. The large volume and high price of TDD will increase the cost, weight, and thedesign complexity of PAR. In addition TDD has low resolution of quantitative and can’tkeep a high accuracy time delay in wide temperature range. So the radar designers arelooking for solutions to replace the TDD. The problems above can be well solved by thedigital array Radar based on the digital T/R module. This paper aims at the most importantpart of the digitalization, and research on the several parts as follows:Firstly, the problems of wideband Phased Array Radar (PAR) are studied and thepresent methods to solve those problems are analyzed. The narrow band character ofphased array antenna, aperture full time, the limitation of radar signal bandwidth and thetraditional methods to solve those problems are introduced.Secondly, research on the key technology of digitialization of wideband phased arrayradar is studied. The design of system framework is given. The DDCS algorithm and theFPGA+DAC with high speed structure are used during the tranmist process. And the digitalreceiver with dechirp and DDC technology is used during the receive process. A study onthe synchronization for muti-channel and digital signal processing is given.Finally, design of the digital T/R is given including system framework and thehardware and software design for each module. Experiments based on the actual hardwaresystem are carried on.