An Implementation Of Digital Pre-distortion Algorithm Base On FPGA

The power amplifier (PA) is a key component which has a great impact on theperformance of the communication system. The nonlinear is the inherentcharacteristic of amplifier. In order to make it working linearly, power amplifier canbe operated in the linear part of the curve. However, this will seriously affect theefficiency of the power amplifier, resulting in a great waste of energy. To enhance theefficiency, the power amplifier works in nonlinear region generally. However thiswill lead to a regrowth of frequency spectrum, increasing adjacent channel powerratio (ACPR), destroying the flatness of signal out-of-band, resulting in distortion ofband signal and increasing bit error rate (BER). Therefore, the linearization of poweramplifier has become one of the hot techniques.A lot of people put forward a lot of theories and methods to ensure both linearityand efficiency. However, digital pre-distortion (DPD) is favored for its excellentlinearization performance, simple implementation complexity. Many internationalcompanies have put forward a variety of solutions or chips of DPD, including Xilinx,TI and so on. Currently, Xilinx has developed an IP core for digital pre-distortion,which can reduce the amplifier ACPR value of24dBc, but its high price prohibitive.In order to reduce the development costs, this paper presents a digitalpre-distortion algorithm which has been worked on FPGA. The algorithm is based onthe amplifier memory polynomial model. The data collected prior to PD generates anupper triangular matrix R and the data collected behind PD generates the matrix Y,then using the matrix R and Y calculate the coefficients by applying the principle ofQRD-RLS algorithm. Write the coefficients into the PD register. When thesubsequent signal input to the PD model, it implements the multiply-accumulateusing the signal and the coefficients with the amplifier memory polynomial model，orpre-distort the signal, to improve the nonlinear of amplifier. The algorithm has beentested and it can reduce the ACPR value of nearly20dBc. It can meet the base needand greatly reduces the development costs.First of all, this paper introduces the basic theory of the nonlinear of poweramplifier and has a detailed description of the main technical indicators of amplifier. Then it analyzes the amplifier behavioral models.This has laid an important theoryfoundation for the study of digital pre-distortion technology. What’s more, this paperfocuses on the study of the QRD-RSL algorithm based on the memory polynomialmodel and confirms the feasibility of the algorithm using MATLAB software. Then itintroduces the design of hardware and software of digital pre-distortion, especially theimplementation of software design base on the hardware platform. Finally, it analyzesthe result, describes the problems during debugging process and presents somedeficiencies and improvements on the design.