A Design Of Digital Pre-Distorion System For Non-Linear Power Amplifier

With the rapid development of wireless communication technology in the past decade, wideband wireless communications has become an inevitable trend. Nowadays, much higher communication capacities of the 3-rd generation and 4-th generation wireless communication systems have been widely used in daily life, such as Multi-input Multi-output and Orthogonal frequency-division multiplexing also have been widely used in various fields of wireless communication.As a high frequency power amplifier, HPA is an essential component of the wireless communication systems. When facing wide-band signal or high Peak-to Average Ratio signal, HPA can seriously affect the quality of communication because of its inherent nonlinearity and memory characteristics, thus resulting in the spreading of the spectrum and in-band signal distortion. Therefore, how to improve the linearization of HPA has become a hot topic. Traditional HPA linearization techniques such as Feed-forward method, power back-off method or IF digital pre-distortion all have the disadvantages that they are difficult to achieve, difficult to adjust, non-flexible applications and less adaptive. In recent years, the DPD(Digital Pre-Distortion) has attracted a lot of attentions, which is used in the baseband and has strong adaptability and low cost.In our study, on the basis of digital pre-distortion technology, we introduced the memory polynomial model, and simulated the DPD system with the memory polynomial model as the PD’s model. Then the adaptive filter algorithm was used to extract the parameters of the model. On the basis of meeting the functional requirements of the digital pre-distortion system and evaluating the resource consumption, we then implemented the system on the hardware. With the combination of computer graphics interface and hardware system, the digital pre-distortion system was tested and verified. Firstly, we built a behavioral model of high frequency amplifier in MATLAB program, and used the indirect learning structure, simulated and analyzed the Least Mean Square method, Least Square method and Recursive Least Square method.Secondly, we analyzed the resource consumption of the simulation results, which includes the RAM and number of multipliers. Then we designed the hardware, including the digital baseband board and analog baseband board and radio frequency board. Meanwhile, we used the EDK method to develop and implement the hardware, developed the adaptive filtering algorithm on the Power PC440 processor, which also communicate with the host computer to calculation and display the results.In the end, the host computer would control the monitoring the hardware working condition, we used three carriers’ WCDMA signals and the digital HPA in FPGA to test and analyze the effects of the algorithm and the digital pre-distortion system.