A Design And Implementation Of Single-carrier Fractional Fourier Domain Equalization System Based On FPGA

With the fast upgrading of mobile communication technology, the bandwidth ofcommunication becomes higher and higher and the rate becomes faster and faster.These result in that the delay spread and the Inter Symbol Interference (ISI) are gettingworse, and therefore anti-multipath fading technology is a hot sport of broadbandwireless communications technology. Single-carrier frequency domain equalizationtechnology can perform well with low peak to average power ratio (PAPR) and it isinsensitive to frequency offset. As it has been chosen as the LTE uplink access scheme,the study of single-carrier frequency domain equalization method and itsimplementation is important. The fractional Fourier transform which is seen as therotation of time and frequency domain plane, compared with the conventional Fouriertransform is better to analysis the time-varying non-stationary signals. With thefractional Fourier transform theory becoming more and more matured prefect, itsapplication has become increasingly widespread. Therefore, this paper will considerdoing the single-carrier frequency domain equalization in the fractional Fouriertransform domain instead of the conventional Fourier transform domain to obtainbetter system performance.First, the paper analyzes the algorithm of the single-carrier Fractional Fourierdomain equalization system based on the analyzing of the conventional single-carrierFrequency domain equalization system, and its Matlab simulation of systemperformance of the conventional Fourier transform domain and fractional Fouriertransform domain equalization is given under different channel conditions throughcomparing the BER performance of them. We get the conclusion: in the fast-varyingchannel conditions, the single carrier fractional Fourier domain equalization has certainadvantages over the conventional Frequency domain equalization, but they becomequite effective in a better channel environment.Then, in the basis of theoretical analysis discussed above, the paper gives a designand implementation of single carrier frequency domain equalization (SC-FDE) system in the conventional Fourier transform domain based on FPGA hardware platform, thedesign principle of the whole system and the individual modules, the data processingflow and the actual simulation results. For each module of conventional frequencydomain equalization system, its ModelSim timing simulation results and hardwaredebugging results using SignalTAP II Logical analysis tool is given.Finally, based on single-carrier frequency domain equalization (SC-FDE) systemof the conventional Fourier transform domain achieved, the paper discusses the designprinciples and the design process of the fractional Fourier transform domain equalizer(SC-FrFDE) system, and gives the simulation results of the whole system and eachmodules. The paper also gives ModelSim timing simulation and hardware debuggingresults with SignalTAP II Logical analysis tool of the major modules of fractionalFourier domain equalization system. In the realization of the System, we can get thereceived data through the PC’s serial debugging tools. And the BER performance ofconventional frequency domain equalization module and Fractional Fourier domainequalization module in the fast-varying channel conditions is given by using theco-simulation of Matlab and ModelSim.