Design And Implementation Of64-bit SIMD BP Component And Shuffle Unit In X-DSP

Digital Signal Processor is a new subject that involves many subjects and is widelyapplied in many fields. After stepping the21st century, our society advances into thedigital age, and DSP is precisely the core of the digital revolution.X-DSP is a self-designed and high-performance64-bit SIMD DSP, it employsVLIW technology and can issue11instrutions in a cycle, the goal of frequency is1.25GHz. Based on the performance requirements of the X-DSP and doublely studied onthe basis of the current mainstream DSP processor architecture and instruction set, thisthesis has completed the designs and realization of64bit SIMD Bit-Processing(BP) unitand shuffling unit, the specific contents are as follows:1. Designed and implemented the X-DSP64BP unit. As one of key elements ofX-DSP arithmetic unit, it mainly performs shift instructions, bit-processing instructionsand packing/unpacking instructions. By using the SIMD structure, it can complete two32bits data operation in a cycle, and can meet the requirement of the data level parallelprogram.2. The shuffle unit is implemented the exchange of data among VPE s in vectorprocessing unit. In this thesis, we researched the characteristical of shuffle instructionwhich from current mainstream chip, and design the shuffle instruction and circuitstructure of our own. It adopts independent SRAM for storing the shuffleto improvingthe efficiency of the implementation of the unit, so when the applications can beexecuted without occupying the system s key resources such as the register file ormemory bandwidth.3. In this thesis, we verified BP and shuffle units in three stages that are the modulelevel, component level and the SPE/VPE level, in the module level we even used SVAformal verification, to ensure the correctness of design function; In the component level,by passing the test incentive loading of the individual components, we have obtained thecoverage of the corresponding module. At the same time,we evaluated the performanceof shuffle unit, the results showed that: in the the same shuffle granularity, the shufflepattern representation efficiency of X-DSP were0.88and0.75, this rate is the highest incontrast to several shuffle units.Finally, We synthesized BP and shuffle units by using Synopsys DC (DesignCompiler), the results showed that:the total area of BP unit is48513.7819um2, the delayof critical path is0.42ns, power consumption is28.1785mw; the area of shuffle unit is662016.8um2, the delay of critical path is0.44ns, power consumption is179.6060mw.Both BP and shuffle units can meet of the target requirement of X-DSP which is1.25GHz.