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Research On Embedded Test Technology For Mixed-signal Circuits

Posted on:2015-04-11Degree:MasterType:Thesis
Country:ChinaCandidate:L WangFull Text:PDF
GTID:2298330422491029Subject:Electrical engineering
Abstract/Summary:PDF Full Text Request
With the development of mixed-signal circuits, the application of them in thefield of national defense military equipment increase widespread. Because theapplications requiring high reliability, so we need test mixed analog-digital circuitsin real time. However, mixed-signal circuits have various hybrid circuit structuresand complex signal, there is no test method of maturation has been proposed likethe boundary scan test method. Testing methods which have been proposed haveproblems on complex design for testability, too much used resource, and they cannot meet testing requirements in the real-time testing, high portability environment.Therefore mixed analog-digital circuit testing theory and methods must be learneddeeply.In this paper, a typical analog circuits and mixed analog-digital circuit testingtechnology is researched. A embedded test program of digital-analog hybrid circuitsis proposed on the basis of modular embedded test methods, and a mixedanalog-digital circuit embedded test verification platform is built. The maincontents are as follows:Firstly, research the test stimulus generation method based on chaotic model.With the chaotic model theory, the D-M chaotic model ATPG(Automatic TestPattern Generation, ATPG) were proposed to solve the insufficient degree traversalproblem of ATPG that discrete Tent chaotic model produces. At the same time usethe ATPG as the test generation of analog circuit, to solve the poor randomnessproblem of happened when originally sequence is converted. In the mean time,analysis the fault feature extraction method under chaotic vector, and simulate toprove the feasibility.Secondly, in order to reduce the ADC testability design complexity andovercome the disadvantage of the large resource occupied under histogram testmeans, design a ADC embedded test algorithms. Optimize the implementation ofembedded ADC histogram test method against the failure mode for ADC, andfinally verify the validity with the simulation method.Then, design a phase locked loop module embedded test algorithm to solve thequestion that an integrated phase-locked loop module using traditional probe testmethods is difficult to be tested. According to the principle of phase-locked loopfunctions, propose the phase-locked loop fault collections, establish a faultdictionary of locked loop low-pass filter and voltage-controlled oscillators under thefault collections and provide a theoretical foundation for fault diagnosis.Finally, a mixed analog-digital circuit embedded test system using an embedded controller for test methods was established, the experimental verificationof embedded test methods and techniques in this article through the results indicatethat these methods can achieve fault diagnosis of the circuit under test.
Keywords/Search Tags:mixed analog-digital circuit, embedded test, chaotic test vector
PDF Full Text Request
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