Research Of Switched-capacitor DC-DC Converter Applied To Radio Frequency LNA

With the rapid development of modern IC technology, battery powered portable electronic devices have been used widely, such as iphone, ipad, digital camera and intelligent watch, etc. The portable electronic products not only improve to a diversified intelligent development in the performance and functionality, the volume and size is also more and more "small, light, thin".In order to meet the needs of these changes and requirements, the products put forward more and more strict requirement and standard to power management chip, which require the DC-DC converter has high efficiency, small volume features and low cost etc.The DC-DC converter is divided into three categories: low dropout linear regulator(LDO), inductance and capacitance type switching power supply. Traditional RF devices power supply commonly used linear regulator, because it has the advantages of good stability, low noise and high reliability.So LDO widely used in RF, audio and ADC conversion applications, but its efficiency is low. Inductance type switching power supply use the inductance coil as an energy storage element, large volume is not easy to on-chip integration and bring larger EMI. It will be difficult to adapt the trend of the modern electronic technology because of these limitations. The switched capacitor power supply only contains switches and capacitors,which achieve the conversion of energy through the charge and discharge of capacitor. The circuit has the advantages of simple structure, small EMI, high efficiency.Switching power supply with low cost and high efficiency for noise sensitive RF end power supply become possible.So the paper proposed a high efficient and low ripple switched capacitor DC-DC converter.The paper has made a detailed analysis and research of the reason caused high output voltage ripple of switched capacitor DC-DC converter.Then we put forward the ripple trapezoidal wave driven controlled technology and the new multi phase ripple suppression technique. Besides,using adaptive clock frequency modulation to inhibit the output voltage ripple effectively,which improve the light load efficiency as well.Firstly we constructed a verilogA system model then make the transistor level design of each module circuit,including the Bandgap reference, VCO, state machine, digital switching capacitor array, ripple suppression circuit and driver circuit. At last, based on csmc0.5um CMOS process, using cadence tool for schematic simulation, the result show that when the input voltage ranges from 2.5V to 5V with the 60 mA of maximum load current, the output voltage ripple is within 2mV, which has achieved the desired requirements.