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Design And Practice Of IEEE1588Slave Clock Based On STM32F407

Posted on:2015-01-05Degree:MasterType:Thesis
Country:ChinaCandidate:X S TangFull Text:PDF
GTID:2272330467985489Subject:Motor and electrical appliances
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In the intelligent substation, all of the monitoring and protection equipments must run under a unified time reference, in order to meet the accuracy requirements of real-time data acquisition and disturbance consistency, in recent years, distributed systems and networking equipment widely used in substations, it requires more accurate clock synchronization accuracy between the intelligent devices of a digital substation, but the current network time synchronization technologies are difficult to meet the synchronization accuracy requirements of the power system, such as high precision, high reliability, low cost. IEEE1588preeision time synchronization protoeol was proposed in2002, provides a practical and feasible way to realize high preecision time synchronization in certain fields with high accuracy and low cost, it is applicable to LAN clock synchronization system such as Intelligent substation.The principle of IEEE1588synchronization protocol is introduced in this paper firstly, elaborates synchronization mechanism of PTP protocol, best master clock algorithm, the model of boundary clock and transparent clock, then introduces the characterization of PTP clock, PTP protocol state machine engine, PTP packet format.An IEEE1588synchronization slave clock system based on STM32F407microprocessor is implemented, and introduces hardware and software design solutions. The hardware design includes:choice of CPU and PHY chip, hardware circuit wiring design of STM32F407MCU, DP83640PHY chip, PL2303HX chip. The software design includes:MAC driver program design, getting timestamp with hardware driver program design, application of Lwip lightweight TCP/IP protocol stack, PTP protocol engine state machine program design, best master clock algorithm program design, program design of IEEE1588clock frequency synchronization and vector synchronization.Time synchronization accuracy of the designed PTP slave clock is tested. when using vector synchronizaton, slave clock synchronization accuracy can reach microsecond level; the results of using frequency synchronizaton and vector synchronizaton show that the precision clock synchronization below200ns is realized, which can fulfill synchronization requirements of the substation. Verify that the frequency synchronization can effectively eliminate the low precision of clock synchronization caused by the clock oscillator frequency deviation.
Keywords/Search Tags:Clock Synchronization, IEEE1588, PTP, STM32F407, Time Stamp
PDF Full Text Request
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