Design Of PFC Chip Based On Boost Topology

As the wide application of the electronic equipments, the harmonic pollution is attracting more and more attentions. The PFC(Power Factor Correction) is an effective technique to reduce harmonic pollution and increase the coefficient of electrical utilization, by which the input current is proportional to the input voltage.Based on the investigation of single stage active power factor correction technology, we adopt the idea of the average current controlled boost type to boost topology for PFC, and design a boost power converter circuit in average current mode control scheme. The main works are as follows:Comparing several topologies of main circuit and controlling circuits, we determine that the object of intensive study is the average current control boost type PFC. In this thesis, we first introduce the origin and develop of boost type DC/DC converter, analyze the variation and wave pattern of voltage and current in various segment and period. Then we analyze boost type converting circuit, and build the emulation circuit. Under simulation, the power factor improves obviously with the parameters we set. It should be noticed that the PFC circuit is a rigidity circuit and difficult to simulate, so we constitute the main functional modules of the circuit, then simulate the whole circuit based on these modules. With the PFC circuit, the input current can effectively track the input voltage, and share the same phase. So this chip can reduce the harmonic pollution and energy consumption very well.The innovation of this work includes: a linear resistor is connected between reverse input of error amplifier and ground constitute a Tracking Boost circuit by which the output voltage VOUT can track the input line voltage VAC. Thereby it can improve the efficiency when the input voltage is low. Also it reduces the wastage of the schottky diode D and the inductance L, meanwhile greatly cuts down the peripheral circuit area and makes PFC modules smaller.Through analysis, simulation and verification, it can be concluded that the proposed converters meets the requirement. The input current has the same phase with input voltage with the soft start and low switch stress during start-up. However, simulation results show that input current distortion is severe, and inductance in power stage is higher than other topology.