The Design And Implementation Of Data Acquisition And Control System In Note Validator

Note validator installed in banknote processing equipment acts as fake banknoteidentification module. The key of note validator design are note validation speed andcapability, high operating reliability and note serial number image recording, etc.Note validation process of note validator includes sensor data acquisition, imagerecognition, fake banknote image storage, and real time note serial number image upload, etc.Image recognition are not discussed, sensor data acquisition, fake banknote image storage,and real time note serial number image upload are focus in this article. Utilizing coordinationof DSP EDMA and interrupt system, high speed sensor data acquisition can be achieved.Utilizing link list storage management, high speed image storage can be achieved. Utilizingcoordination of timer, EDMA and interrupt system, real time full note serial number imageupload can be achieved. This process can reduce CPU time occupation, which build upfoundation of increasing note validating speed.High quality sensor signal is foundation to ensure note validation capability. A simplereliability CIS sensor and thick sensor calibration methods are proposed in this article. Inorder to adapt the affect from environmental changing and components aging, magnetic signalbias voltage correction and zero thickness value voltage compensation methods are proposedin this article.Note validator need to communicate with upper computer when operating, and iscontrolled by upper computer. Reliable communication mechanism is foundation to ensurestable operation. A reliable communication protocol is proposed in this article, which isachieved by utilizing mechanisms of acknowledge confirmation, dual buffer and time outjudgment between characters, etc.12piece/s note processing speed,2m/s note moving velocity,32MByte/s sensor dataacquisition speed are achieved in note validator finally. While recognizing banknote, full noteserial number image recording is completed simultaneously, which upload speed is up to12Mbtye/s. Batch data acquisition capability, sensor calibration and compensation functionare also equip.Technology status of foreign products is analyzed firstly in this article. And then,technical specifications, overall hardware and software framework of this note validator areproposed.3working modes of note validator are introduced systematically, includingsoftware implementation of sensor data acquisition, data storage and real time full note serialnumber image upload of recognition mode, etc. Batch data acquisition method of acquisition mode. Sensor calibration method of calibration mode. Data preprocess methodand upper computer communication protocol design are introduced afterwards. That thedesign above can achieve related function well is proved by test data finally.