Emitter Manufacture By Low Temperature Vapor Phase Epitaxy Method For C-Si Solar Cells

Epitaxial deposition by low temperature vapor phase deposition method hasgreat potential in terms of p-n junction preparation. In this paper, Epitaxial depositionat200oC by radio frequency plasma enhanced CVD (RF-PECVD) is explored fordoped silicon films, and rapid thermal annealing method (RTP) is used to improve thecrystallization and dopants activation. Then the method is tried to make the emitterlayer for the silicon solar cells. The main work and results are as follows:For the epitaxial doped silicon film deposition by RF-PECVD method, effects ofelectrodes distance, depositing time and doping gas flow rate have been analyzed. Byadjusting the parameters, high quality epitaxial n-type silicon films on p-type Si(100)substrate have been prepared. It is found that reducing electrode distance couldimprove the crystallization of the epitaxial films. The crystallization becomes worsewith the thickness of the films increasing (depositing time increasing) or the dopinggas flow rate increasing.The epitaxial films were modified by RTP with halogen light heating and in Argas. It is found that this post-annealing process can improve the crystallization anddopants activation of the films. In our research, holding at1050oC for20seconds isthe best choice.The epitaxial n-type silicon films with a resistivity of~1×10-3cm are usedto make the emitter of the silicon solar cells. The structure of the cells is Ag grids/ITO/n-type epitaxial silicon film/p-type silicon wafer/Al. The open circuit voltageand the short circuit current of the solar cell both increase with the thickness of theemitter layer increasing in the range of400-15nm. With the decreasing of the PECVDelectrode distance, the short-circuit current and the open circuit voltage of the solarcell are reduced accompanied by uniformity reducing.Post annealing process after the emitter layer deposition can improve theproperty of the cells. In our research, the T-t profile with (850oC holding120s)+(1050oC holding20s)+(650oC holding21.5min) is the best choice.The highest efficiency of the solar cell prepared by the optimum processing is about9%under the standard test condition (AM1.5G). It is found that inserting anultra-thin heavily doped n-type amorphous silicon layer between the ITO and theepitaxial emitter layer can enhance the short-circuit current and the open circuitvoltage of the solar cell devices.