Design And Implementation Of Digital Array Radar Echo Signal Simulator

In the process of the development of Digital Array Radar(DAR) system, the performance of Digitl Beamforming(DBF) processor and signal processor needs to be tested under the environment of different targets, interferers and noise. Due to the cost, the limitation of the experimental conditions and the influence of environmental factors such as the weather, it is very difficult to completely test all performance indexes of DAR system in the real environment, and it requires a dedicated signal simulator. So it is of great significance to develop the echo signal simulator of DAR.In this thesis, an echo signal simulator of DAR was designed for the needs of the system, which adopts the scheme of the assembly test circuit based on FPGA and the PC software. The PC software sends control commands to control the operative mode of the whole system and sends echo parameter information to control assembly test circuit to generate80-channel echo baseband digital signal including interferences and noise. The echo signal simulator communicates with DBF processor via the bi-direction8-channel fibers under the rate of2.5Gbps for multi-channel baseband data sending and muit-beam forming data receiving. The simultaneous multi-beam forming data are used for the measurement of the simultaneous multi-beam radiation pattern performance and the anti-interference performance of the DBF processor.The system debugging results show that the developed DAR echo signal simulator can generate the accurate target echo with distance, speed and angle information, and can add power controllable repressive interference and gaussian noise according to the system test requirements. It can be used for the measurement of the simultaneous multi-beam radiation pattern performance and the anti-interference performance of the DBF processor, and for verification of the performance of subsequent signal processor.