DBF Digital Array Radar Processor Design And System Testing

With the continuous development of radio frequency integrated circuit, large scale integrated circuit and digital signal processing techniques. The digital array radar adopting digital beamforming technique has been available. However, there are still many difficulties existing during the development process of DAR, such as the convergence of multi-channel massive baseband data, the implementation of high-performance real-time adaptive beamforming algorithm and simultaneously multi-beam forming. New DBF processing platform with advanced architecture and high performance is urgently needed.This paper is based on the development of DAR. Firstly, one DBF processor was designed based on optical fiber interface and the high performance FPGA+PowerPC architecture, which can realize20Gbps baseband data real-time transmission and digital multi-beam forming and adaptive weight coefficient calculation Independently. Then, software design is realized in two FPGAs of the DBF processor following the actual requirements of the DAR. Function and performance testing are completed including the figure testing of the beam and beam scanning testing. Finally, the system integration is completed including the DBF processor, digital T/R, frequency combined and calibration, radar signal processor, then the digital beamforming function testing of the entire DAR system is completed.