Parallel FDTD Algorithm Perfectly Matched Layer Boundary And Its Application In Photonic Integrated Circuits Based On

With the fast development of science and technology, the requirements of integrated optics technology have been increasingly become prominent. Based on the technology of planar lightwave circuits (PLC), the PLC chips have been used in many high technology devices. It is very difficult to design modern PLC chips with analytical methods. Numerical simulation methods have many advantages to simulate the complex PLC structures. Among of the numerical simulation methods, Finite-Difference Time-Domain (FDTD) method has been widely used in the calculation of PLC chips as an effective method nowadays.In this thesis, a parallel FDTD algorithm, perfectly matched layer (PML) as absorbing boundary condition, has been carried out with C++language using Message Passing Interface (MPI) library. Some important parameters, such as region segmentation, process network topology, data transmission, and the selection of the communication function, are discussed and optimized in this thesis.For two-dimensional (2D) parallel FDTD algorithm, the parallel efficiency reaches to93%and the speedup ratios reaches to1.88when it is divided into two nodes. The parallel efficiency reaches to80%and the speedup ratios reaches to3.24when it is divided into four nodes. For three-dimensional (3D) parallel FDTD algorithm, the parallel efficiency reaches to90%and the speedup ratios reaches to1.8when it is divided into two nodes. The parallel efficiency reaches to73%and the speedup ratios reaches to2.9when it is divided into four nodes.The typical PLC devices are simulated by this parallel FDTD algorithm. The accuracy of this algorithm is validated by analytical analysis for strip waveguides and micro-ring resonators. The3D coupling structure and slot structure are analyzed and optimized using this3D parallel FDTD algorithm.