System-level BIT False Alarm Reducing Technology

With the performance improvement of modern weapon systems and equipment, thecomplexity of these weapon systems continues to improve, which increases the couplingdegree among subsystems. The high degree of coupling and integration challenges tothe safety and maintenance of weapon systems, so more and more researches attachimportance to design for testability (DFT). The built-in test (BIT) is an important aspectof the design for testability, which refers to automatic testing capabilities (includingfault detection and isolation) built in system or equipment. System-level BIT canintegrate testing software and hardware resources throughout the system to constitute aBIT system, which plays a positive role in fault detection and isolation in complexequipment. Similar to module level BIT, system-level BIT also confronts withintractable problems (false alarms), which are serious obstacles for system-level BIT toperform well.Focusing on reducing system-level BIT false alarm, system-level BIT false alarminducements and their mechanism are studied in this paper. An expert system isdeveloped to reduce system-level BIT false alarms. Based on the analysis of falsealarm mechanism of system-level BIT, it is found that fault propagation among nodesis the main inducement. From this standpoint, the false alarm reducing technology isresearched based on fault propagation analysis. The main contents of this paper are asfollows.1. False Alarm Mechanism of System-level BITAiming at the characteristics of system-level BIT, system-level BIT false alarminducements in the entire life cycle (design, manufacture, operation and maintenance)and the mechanism of these inducements are analyzed. We mainly focused on thedesign stage of system-level BIT, from the point of BIT structure and the integratingincentives. Based on the researches of false alarm mechanism, some guide lines areprovided to reduce system-level BIT false alarms.2.Expert System to Reduce System-level BIT False AlarmTo solve the problem lacking design rules to reduce system-level BIT false alarms,the evaluation method of module (at different levels) importance degree is studied.Combining the false alarm mechanism and rules to reduce system-level BIT falsealarms, an expert system is developed to instruct system-level BIT designers how toreduce false alarms in the design stage. The expert system is validated in the designprocess of a radar system, which shows a promising result.3.Analysis of Fault Propagation Characteristics and Fault Propagation Model ofComplex SystemFocusing on the main inducement (fault propagation) of system-level BIT false alarm, this paper studies the fault propagation characteristics in complex system andestablishes the fault propagation model based on the digraph theory, which depicts thefault propagation relation in complex system. In order to reduce the difficulty of falsealarm recognition, this paper studies the method to divide complex system withsmall-world networks properties into several societies based on the improvedWu-Huberman algorithm.4.System-level BIT False Alarm Reducing Technology Based on Fault PropagationAnalysisThe false alarm mechanism induced by fault propagation is deeply researchedbased on the fault propagation model depicted in the former section. According to thedefinition of fault propagation influence degree (FPID), the false alarm reducingtechnology based on fault propagation analysis is studied and it is validated by theapplication of a stabilized tracking platform system, which shows effective recognitionof system-level BIT false alarm induced by fault propagation.