Design And Implementation Of Parrallel Programming Environment For Low Power Audio DSP

In recent years, intelligent audio applications have spread tohandhelds, which demand increasingly high computing capacity.Meanwhile, the battery life of handhelds is getting shorter. Higherperformance and lower power consumption are the main developmentdirection of mobile processors. Due to its powerful processing capacityand relatively reasonable power consumption, heat radiation andmanufacturing cost, multicore has become the mainstream scheme ofmobile processors.APC (Audio Processing Core) is a low power DSP optimized foraudio applications. It is multicore design. It has limited computationalresources, multistage hybrid storage and none operating systemenvironment.Audio application must be must be parallelized to exploit thecomputing capacity of multicore APC. Parallel programming model isnecessary for parallel program design. Existing parallel programmingmodels are usually architecture specified. APC need a parallelprogramming model optimized for its hardware architecture.. In this paper, a parallel programming model is designed andimplemented for multicore APC. The parallel programming model haslightweight runtime environment, multi-level hybrid storage architecturesupport, and various inter-core interaction modes.To evaluate the performance and overheads of the parallelprogramming model，a multicore instruction set simulator is designed andimplemented to simulate the hardware environment to run the parallelprogram. Four test cases are ported on multicore instruction set simulator.Experimental result shows, this programming environment in this paper isable to exploit the computing capacity of multicore APC with littleoverheads and user friendly programming interface.