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Algorithm Research And Hardware Implementation Of Depth Map Extraction Of2D To3D Video Conversion

Posted on:2014-05-20Degree:MasterType:Thesis
Country:ChinaCandidate:L W TengFull Text:PDF
GTID:2268330401983639Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
3D television has gradually become the major TV products, but the3D media arestill rare. A widely used solution is transferring2D media to3D. Extract depth map inthe3D display technology involves a lot of the image processing technique. Thequality of the depth map directly affects the quality of the synthesized3D media, sothe research of extraction the depth map is very important in the processing of2D to3D.This paper reports an improved algorithm and the related hardware design ofextracting depth map.First, based on researching the current algorithm this paper introduces animproved method of motion estimation of block matching. Here is the innovationpoints:Down-scaling the image as a preprocessing. Extract the motion vector of thedownsized picture significantly reduced the computation of the block matchingUsing the edge detection results as a reference when smoothing. It can solve theblur problems cause by smoothing and improve the quality of image. Compare twocoherent frames to get the degree of scene change and use in processing the depthmap, so that the3Dstreoscopic image obtained by the depth map will not obtrusive.Secondly, this paper finished the hardware design and simulation. Including:The architecture of the depth map extraction system. Ping-Pang RAM and linebuffer are used to improve the speed of caching and the processing. It cancontinuously process data without interruption.The design, optimizing and integration of the sub-modules. Use shifter to replacethe multiplier and divider reduce area and improve the efficiency.Use the System Verilog verification platform and the FPGA verification platformto simulate the hardware.This paper introduces the research of Depth Map Extraction; it proposes an improved algorithm and finished the hardware design. The final result shows thealgorithm enhanced the accuracy of the extraction of depth maps and reduced thecomputation. The architecture design is effective and powerful with reduced hardwareresource. Not only reduced the size but also reduced cost.
Keywords/Search Tags:2D to3D, depth map, block matching, FPGA
PDF Full Text Request
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