Graphical Design And Implementation Of Direct Sequence Spread Spectrum Communication Link In SDR

In software radio, the digital signal processing technology has been widely applied.But the conventional digital signal processor executes sequentially with low efficiencyand bad reconfigurability. Digital signal processing system implemented by FPGA withparallel processing features has real-time performance and flexibility. Therefore, theway of using FPGA to process digital signal becomes a new trend.However, the traditional FPGA developing requires engineers to be quite familiarwith the hardware description language and have a certain understanding of hardware.It’s more difficult for algorithm engineers. With further research, foreign companieshave launched the FPGA graphical development environment and platform, but thedevelopment environment is complex, the resources of the hardware platform arelimited, and the cost of procurement is exorbitant, which can not meet different needs ofusers.An FPGA graphical development program based on USDR platform is designed, anda direct sequence spread spectrum communication link is achieved by this way. Theprogram basing on the idea of foreign FPGA graphical development and combiningwith the actual hardware platform is a new program for the FPGA engineers.Firstly, an FPGA graphical development based on USDR platform is designed.According to the structural characteristics of the actual hardware platform and learningfrom System Generator design tools, an FPGA graphical development program is putforward for USDR platform. The program includes the development template, custommodule library, automatic code generation and other functions.Secondly, the graphical design of direct sequence spread spectrum communicationlink is researched. Communication link is divided into different functional modulesaccording to the structure of the algorithm. The design idea of the key module isproposed. Combining with FPGA graphical development program the internal structureof the main modules are designed in detail.Thirdly, FPGA graphical development test and communication link data transceivertest are completed. By FPGA graphical development test, the feasibility of developmentprogram is verified. Through communication link data transceiver test, when the biterror rate of106, the signal-to-noise ratio of actual bit error rate curve deteriorates2to3dB comparing with the theoretical curve.The communication link can guarantee thereliable transmission of control commands, with a strong anti-jamming capability tomeet the application requirements of actual project.FPGA graphical development program based on USDR platform is designed, and adirect sequence spread spectrum communication link applied in the actual project isachieved in this paper. This study enriches the research of domestic FPGA graphical development technology. Combining with actual hardware platform makes it have agood commercial value.