Implementation And Co-Simulation Of Hybrid Pilot-Aided Channel Estimation With Decision Feedback Equalizer For OFDM Systems

Orthogonal Frequency Division Multiplexing (OFDM) is well known as a highlyspectral efficient transmission scheme capable of dealing with severe channelimpairments encountered in mobile environment. OFDM has been chosen as the airinterface standards for IEEE802.11a, DAB and LTE. OFDM can largely eliminate theeffects of inter-symbol interference for high speed transmission in highly dispersivechannels with a relatively low implementation cost by separating a single high speed bitstream into a multiplicity of much lower speed bit streams each modulating a differentsubcarrier. However OFDM is known to be vulnerable to synchronization errors due tothe narrow spacing between subcarriers. Inaccurate channel estimation will also degradethe performance of OFDM systems. In addition, the implementation of channelestimation algorithm heavily relies on the verification process. The conventionalimplementation method is time consuming for the developers have to transplant thewhole algorithm into FPGAs or DSPs even the part which has been verified.To solve these problems, this paper introduces novel hybrid pilot-aided receiverwith decision feedback equalizer (DFE) for OFDM systems and its correspondinghardware co-simulation platform. This pilot-aided channel estimation algorithm consistsof two parts: coarse estimation and fine estimation. In the coarse estimation, thecombined classical channel estimation methods including carrier frequency offset (CFO)and channel estimation are used. Based on the received training sequence and pilottones in the frequency domain, the major CFO, sampling clock frequency offset (SFO)and channel effect coefficients are derived. In the fine estimation, the pilot-aidedpolynomial interpolation estimation combined with a new decision feedback equalizerscheme based on minimum mean squared error (MMSE) criteria is proposed to reducethe residual effect caused by imperfect channel equalizer, SFO and CFO. At the sametime, for the purpose of speeding up the whole development and verification process, anew architecture of co-simulation platform which combines software and hardware isintroduced.