The Key Technology Research Of FPGA Graphic Design In USDR Platform

Currently, FPGA has become the ideal device of the high-performance digital signalprocessing. In the FPGA internal, it has not only the rich resources of logic, also includshard-core the multiply-add unit, high-speed memory as well as multiplexer and so on,but also has the ability of the high degree of parallel computing, particularly suitable forthe high-speed data acquisition, the completion of the digital filtering, the complexcontrol logic, fast Fourier transform, etc. It has been successfully applied the multiplefield of the communication, network, graphics, audio, software-defined radio, etc.However, the designers of FPGA carried out the design of processing algorithms ofthe digital signal, they may often be faced one of the greatest problem that how tocomplete the algorithm design to the conversion of physical realization, which is alsothe problems faced by the Algorithm Engineer of the USDR software-defined radioplatform. The main reason for the problem are as follows:(1) Most of the algorithms engineers is usually familiar with the C language orMATLAB tools, but do not understand the HDL language, but also think that therequests of the the HDL language in the aspect of statement can be integratedlimit their thought of completing the algorithm;(2) It has the high requirement of hardware knowledge for the Algorithmengineers.While the usual hardware engineer understood lessly the complexity ofthe digital signal processing algorithms;(3) Algorithm engineers need to face processing the specific hardware interface andclock on FPGA, But the interface resources on the hardware platform are toocomplex for algorithm engineers.To this end, this paper design a FPGA graphical tool for the USDR software-definedradio platform. It can let the algorithm engineers complete the task from the Simulinkdesign directly to the generation of the hardware bit file, and do not need to know theimplementation details of the underlying hardware resources, also clean the obstacles ofthe hardware programming, in order to use USDR platform quickly and efficiently Aspecific study contents include the following several aspects:Firstly, it makes a detailed analysis of the home and abroad’s existing FPGA graphicaldesign tools and the technical status of the typical products, and put forward theapplication scenario and system architecture of the FPGA graphical design tool for theUSDR software-defined radio platform,and clear its need of functions and indicators.Secondly, this paper divide the software architecture of the FPGA graphical designtools into three design part, followed by the top-level design, the port design ofSimulink module and the design of automatic code generation system. It use aself-top-down design way to achieve the top-level modules and submodules, at the same time also complete the automatic code generation system and the creation, packages,internal design for Simulink module.Thirdly, this paper build a testing link in the Simulink environment, it contains all theself-definition Simulink module, and then generate the bit file of FPGA in theaccordance with of the tool flow of execution. also download the bit file to The FPGAdevices to carriy out the testing and validation. The test results show that theself-definition Simulink module meet the functional requirements and the use of toolhas the reliability and effectiveness.The research of this article verify the feasibility and effectiveness of carriying out theFPGA graphical design in the USDR software-defined radio platform, so that thedevelopers can complete the task from the Simulink design directly to the generation ofthe hardware bit file of the USDR platform quickly and easily. As the same time, it helpthem to shorten the system design cycle and improve the efficiency of development.