The Research Of RSA Algorithm And The Design Of ASIC

RSA is recognized as one of the most secure and mature public key cryptosystemsby the industry, used in data encryption technology. RSA can not only achieve theencryption and decryption of data, but also meet the needs of the digital signatureauthentication and identification, which is the representative of public keycryptography algorithm. However, the security of the algorithm is based on thedifficulty of large integer factorization. With the improvement of computer processingpower, RSA security is increasingly dependent on more complex math. Thereforesoftware technology to achieve data encryption has been unable to meet therequirements of the speed and security. Therefore, a design of high-performance RSAcryptography chip is of great significance to increase computing speed and systemsecurity.Firstly, analyze and study the various implementations of RSA algorithm, focusingon how to take advantage of the Montgomery modular multiplication algorithm toachieve RSA quickly. By contrast, assessment and trade-off speed and area, thendetermine to design RSA chip in word-based Montgomery modular multiplicationalgorithm. In order to obtain higher speed and lower cost of hardware resources, thedesign method of pipeline is used. The design also uses mode length programmable,minimum supporting1024bit, up to2048bit, which is suitable for different occasions.Based on security consideration, the design adds random pseudo-operation and randomscanning algorithm, making it has a strong anti-time attack characteristic.The thesis not only completes RSA core RTL level design and verification, but alsocompletes logic synthesis, design for testability, automatic placement and routing andother ASIC design process, based on SMIC0.13μm process using EDA tools. Finally,the layout of RSA core is accomplished. The analysis results show that the design canachieve better parameters of performance such as the operating frequency up to188MHz, equivalent gates of160k, data throughput of81K in2048bit mode (292K in1024bit mode) and average power consumption of35mW, which reaches the level ofcommercial uses.