Research Of Blind Equalization Algorithm And Its FPGA Implementation

In data communications, the impact of the communication channel bandwidthlimitations, multi-path propagation and other factors will cause data overlap that is theinter-symbol interference at the receiving end when sampling inevitably, thus reducing thedata signal’s transmission efficiency and quality, so the equalization techniques are used toimprove the transmission’s not ideal characteristic. Blind equalization techniques have theadvantages of automatic update coefficient and don’t require training sequences, thusobtained the widespread attention. In this paper, the main research is in the group delaychannel or under the established complex environment the performance of blindequalization algorithms and its FPGA implementation. The main work is as follows:First of all, the basic theory, methods and implementation of the blind equalizationalgorithms are studied. Because of the constant modulus algorithm is simple and easy toimplement, this thesis focusing on the research of several kinds of the improved blindequalization algorithms, which are based on the constant modulus algorithm. Use theMatlab simulation technique, analyze and comparison the advantages and disadvantagesof the algorithms.Secondly, in order to improve the convergence speed and steady-state error, thevariable step-size algorithm which is based on the modified constant modulus algorithm isresearched. Through the Matlab simulation analysis, this paper studied the normalizedvariable step-size technique and the variable step-size method based on the Sigmoidfunction respectively. Based on the above researches, this thesis put forward a newvariable step-size blind equalization algorithm, the step size is based on the error statisticalmean to change.Thirdly, based on the study of the switched dual mode algorithm, which is combinedby the modified constant modulus algorithm and the decision-directed algorithm, a newalgorithm is proposed. The new algorithm is a combination of the modified constantmodulus algorithm and the multi-modulus algorithm and the variable step-size algorithmis embedded on it. Through the Matlab simulation analysis, it is showed that the new algorithm is effective.Finally, the implement of the blind equalizer which is based on the FPGA is studied.Using the Verilog HDL language, the hardware design of the modified constant modulusalgorithm and the switched dual mode algorithm is given. Programming in the XilinxISE9.1i setting and through the ModelSim simulation, it is showed that the blind equalizeris effective.