Study On Water Layer Echo Model And Design Of System Signal Processing Of Broadband Acoustic Doppler Velocity

Doppler Velocity Log (DVL) is an important instrument, which is used to measure ship velocityand navigate for many years, according to the theory of Doppler effect of sound wave in the water.The study on echo model is important to velocity measurement and a signal processing system withlow cost, strong calculation and real-time is an essential part for DVL.Based on Doppler frequency shift, we mainly research on the water layer echo model and theimplementation of a signal processing system in this thesis.The first part is about acoustic echo spherical scattering model. Firstly Doppler effect and itsmeasuring principle are introduced. After analyzing the factors which affect velocity measurement,some solutions, including Janus and phased array technology etc are discussed to reduce the effects.And then after studing the existed seabed and water layer echo model, analyzing their merits anddemerits, a new water layer echo model is established. Aqueous layer echo formula is derivedaccording to spatio-temporal characteristics of the signal reflected by water layer. Finally, simulationresults based on the new model are presented to estimate Doppler frequency performance innarrowband and broadband signal modes respectively.The second part is about the design of the signal processing system of DVL. Firstly the designof hardware scheme, system frame, constitution blocks and work flows are discussed. Then thefunctions of each block and choosing proper chips are introduced according to the systemrequirements. Lastly, four key blocks, including storaging data, producing broadband signal,processing data in frequency domain, beamforming and complex correlation calculating areintroduced. Reading and writing data with SDRAM, implementing Fast Fourier Transform with IPcore, producing carrier frequency signal, quadrature demodulation in frequency domain areemphasised. The codes and top port maps of each block, as well as the simulation graphics andhardware timing diagrams catched by SingleTapII are presented, proving the correctness andeffectiveness of the system.