Design Of Time-varying Inter-harmonic Analyzer Based On Adaptive Notch Filter

The inter-harmonic pollution has become more and more serious since extensive power electronic devices are used in power system. The whole power system is facing the serious security hidden danger. In this thesis, an adaptive time-varying inter-harmonic analyzer is designed to realize the real time measurement and analysis of the power inter-harmonic.Firstly, the harm pollution and the development of the detection of inter-harmonic are briefly introduced. The algorithm for inter-harmonic analysis such as Fourier transformation, wavelet transformation, wavelet packet and instantaneous reactive power are briefly analyzed.The discrete-time inter-harmonic analysis algorithm based on adaptive notch filter is proposed by use of Runge-Kutta method to calculate the unknown and variable fundamental frequency and the amplitudes of harmonics and inter-harmonics, which is verified by simulation. Based on the proposed algorithm, the whole scheme of inter-harmonic analyzer is presented including the functions of detection of voltage and current, inter-harmonic parameters analysis, remote communication, data storage and data display.The hardware for analysis of time-varying inter-harmonics using dsPIC24as core is proposed which master-slave framework to improve real-time property. The master unit includes one CPU, real-time calendar clock, data storage, communication interface, button and display and so on. The slave unit including four CPUs and the modules for detection, processing and sampling of voltages and currents in three-phase four-line circuit realizes the inter-harmonic parameters of three phase voltages, three phase currents and the zero-sequence current. The master CPU and the slave CPUs are inter-connected by SPI interface.The key program flow blocks of both master CPU and slave CPUs such as the main routine and the communication processing based on the DL/T-645protocol of master CPU, and the timing sampling and the data processing and the SPI communication of slave CPU are depicted. Finally, the analyzer is summarized and its utility is discussed.