Multibeam Interferometric Bathymetry Algorithm Implementation On FPGA And DSP

Multi-beam bathymetric sonar occupies the main position in ocean exploration anddetection of the seabed topography. Nowadays, most multi-beam bathymetric sonar systemuse phase detection in the central beams and amplitude phase detection in marginal beams,which led to the problem of uneven depth measurement between central and marginal parts.The multi-beam interferometer bathymetry is a arithmetic with the feature of high accuracyand better resolution capability, which could greatly improve the detection capabilities ofunderwater engineering.This article proposes a solution of implementing the multi-beam interferometerbathymetry based on the platform of FPGA and DSP. This solution can fully integrate theadvantages and characteristics of FPGA and DSP chip severally, saving the system resources,improving the working efficiency of the algorithm, and solving the problem of realizing thisbathymetry arithmetic practically and accomplishing the real-time operation. The FPGA chipis Altera CycloneII EP2C50F484C, implementing the Hilbert converter, data buffering,sub-array forming, zero padding processing,128-point FFT beam forming and data uploadingmodule. To optimize the performance, the system reduces the glitches and unstable states. TheDSP chip is TMS320C6713B of TI, acquiring the phase difference estimation, andtransforming the DOA,TOA into depth information. By using one FPGA and two DSPssynchronously, the platform realizes the algorithm with increasing performance. In addition,80-channels A/D acquisition module combined in the hardware platform could improve theefficiency of data processing.This article verifies the logic timing correctness of each module by using the ModelSimtiming simulation and Quartus waveform simulation; makes the conclusion of receiving thebasically right data by contrasting the DSP processed data and MATLAB simulationinformation during every pivotal step. Because of the pipeline and parallel within the FPGAdesign, and the cooperation of two chips of DSP, the operational efficiency of the algorithm isimproved. Through the analysis of the overall design, the time and accuracy of algorithmrealizing performance meets the requirements of system, achieving the expected effect.