Design And Implementation Of Crest Factor Reduction Based On FPGA

The Small Cell concept originated Femtocell technology was originally designedfor usage of family. It is a low power, small volume wireless accessing node. ePicoxxxxseries product provides HSDPA‐>HSUPA‐>HSOPA evolution. Multi-carriermodulation technique provides support for this evolution of capacity. But one of itsmain disadvantage is the high peak to average power ratio (PAPR). Crest FactorReduction (Crest Factor Reduction, CFR) is an method to reduce the PAPR value.This thesis focuses on the the PAPR problem faced in the product developmentprocess, has analyzed the research status and development of the technology of CFR,the causes of multi-carrier system PAPR excessive, and some representative CFRmethod. In this paper, the realization of the structure of the CFR in the digital signalprocessing are discussed, the selection of FPGA devices, combined with the productspecifications and performance indicators has been completed, and then the selectionand design of the program based on PC-CFR has been analyzed.In the implementation processing of FPGA-based CFR design, the paper alsodescribes a System Generator method which is used to quickly build design models forsimulation, and automatic generation of code.Finally, the paper gives the results of the FPGA-based CFR algorithm design﹑simulation and automatic code generation. That is the ACLR of the product is not lessthan55dB. And the PAPR value decreases greater than2.6dB when the EVM is lessthan7%.