Research Of Airborne SAR/ISAR Real-time Imaging On FPGA

The ship target imaging for airborne radar is implemented by neither the syntheticaperture radar (SAR) imaging technique that the radar is moving with the targetstationary, nor the inverse synthetic aperture radar (ISAR) imaging technique that theradar is stationary with the target moving. For both the radar and targets moving, asynthetic imaging method is needed to get high-resolution of ship targets. This thesismainly studies a synthetic imaging method based on SAR/ISAR imaging for shiptargets and its real-time processing based on FPGA.Both the radar and ship are of moving when the air borne radar is utilized toimage a ship. It is difficult to achieve desired results with SAR or ISAR technique.Because of the radar moving, it brings obvious range walk and range curvature, andalso makes a poor correlation of adjacent envelope. All of these make it difficult toalign the envelope. Thus, it is needed to correct range cells migration by using SARtechnique to make the echo envelope straight. After the dechirping processing to echosignal, the time-frequency transform method can be applied. Then single target can beextracted to do envelope alignment and auto-focus and then finally imaged with a finerquality.This thesis uses FPGA instead of DSP chip as main processor to do real-timeprocessing for the mix-image in SAR/ISAR. The SAR/ISAR mix-image processinghas a big amount of data which is complex. It takes5high-end FPGA chips to realizethe algorithm which includes DDC, range pulse compression, range cell migrationcorrect, cross dechirping, envelope alignment and auto-focus. DSP is traditionally usedbecause it is of high difficulty to estimate the auto-focus original phase in ISARprocessing. This thesis has introduced a new technique that it all takes FPGA to realizereal-time ISAR processing. For the estimation of original phase, the new techniqueuses look-up table and thus meets the need of both the real-time processing andprocessing accuracy. Furthermore, there are many transform processes of rangedirection and cross direction in imaging. The thesis implements transpositionoperations with DDRII SDRAM that controlled by FPGA which reduces datatransposing time greatly compared with DSP.